D10.33 TRCIDR4, ID Register 4

The TRCIDR4 indicates the resources available in the ETM trace unit.

Bit field descriptions

The TRCIDR4 is a 32-bit register.

Figure D10-30 TRCIDR4 bit assignments
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NUMVMIDC, [31:28]

Indicates the number of VMID comparators available for tracing:

0x1One VMID comparator is available.
NUMCIDC, [27:24]

Indicates the number of CID comparators available for tracing:

0x1One Context ID comparator is available.
NUMSSCC, [23:20]

Indicates the number of single-shot comparator controls available for tracing:

0x1One single-shot comparator control is available.
NUMRSPAIRS, [19:16]

Indicates the number of resource selection pairs available for tracing:

0x7Eight resource selection pairs are available.
NUMPC, [15:12]

Indicates the number of core comparator inputs available for tracing:

0x0Core comparator inputs are not implemented.
RES0, [11:9]
res0Reserved.
SUPPDAC, [8]

Indicates whether the implementation supports data address comparisons: This value is:

0Data address comparisons are not implemented.
NUMDVC, [7:4]

Indicates the number of data value comparators available for tracing:

0x0Data value comparators not implemented.
NUMACPAIRS, [3:0]

Indicates the number of address comparator pairs available for tracing:

0x4Four address comparator pairs are implemented.

Bit fields and details not provided in this description are architecturally defined. See the Arm® Embedded Trace Macrocell Architecture Specification ETMv4.

The TRCIDR4 can be accessed through the external debug interface, offset 0x1F0.

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