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The TRCITIATBINR reads the state of the input pins described in this section.
The TRCITIATBINR is a 32-bit register.
For all non-reserved bits:
Bit fields and details not provided in this description are architecturally defined. See the Arm® Embedded Trace Macrocell Architecture Specification ETMv4.
The TRCITIATBINR can be accessed through the external debug interface, offset