B3.7 ERR0PFGCDN, Error Pseudo Fault Generation Count Down Register

ERR0PFGCDN is the Cortex®‑A76 node register that generates one of the errors that are enabled in the corresponding ERR0PFGCTL register.

Bit field descriptions

ERR0PFGCDN is a 32-bit register and is RW.

Figure B3-5 ERR0PFGCDN bit assignments
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CDN, [31:0]
Count Down value. The reset value of the Error Generation Counter is used for the countdown.
Configurations

There are no configuration options.

ERR0PFGCDN resets to UNKNOWN.

When ERRSELR.SEL==0, ERR0PFGCDN is accessible from B2.49 ERXPFGCDN_EL1, Selected Error Pseudo Fault Generation Count Down Register, EL1.

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