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This section describes the programmers model of the
The register block in the SoC-600 DP is shared between two different protocol engines, the JTAG-DP and the SW-DP.
The DP programmers model consists of the following registers. The programmers model is based on the Arm® Debug Interface Architecture Specification ADIv6.0. Since the DP only supports 32-bit addressing, any read to BASEPTR1 always returns 0 and any writes to SELECT1 register are ignored.