1 About CoreSight SoC-600
CoreSight™ SoC-600 is a member of the Arm embedded debug and trace component family.
Some of the features that CoreSight
SoC-600 provides are:
- It is a collection of components that can be used for debug and trace of
from simple single-processor designs to complex multiprocessor and multi-cluster
designs that include many heterogeneous processors.
- Support for the Arm® Debug
Interface (ADI) v6 and CoreSight v3
Architectures that enable you to build debug and trace functionality into your
systems. It supports debug and trace over existing functional interfaces.
- Configuration using Arm Socrates™ System Builder.
- Components that support the development of low-power system implementations
through architected fine-grained power control.
- Q-Channel interfaces for clock and power quiescence.
- The Arm
LPD-500 can be integrated with CoreSight
SoC-600 as part of
a full-chip power and clock control methodology.
- A library of configurable CoreSight components that are written in Verilog,
and that are compliant with the Verilog-2001 Standard (IEEE Std
- A Socrates System Builder configuration flow that:
- Validates your component configuration choices.
- Generates IP-XACT descriptions for your chosen component
- Copies all required design files into your target
- Generates UPF constraint files at component level for
signals that are able to cross power domain boundaries.
- Example timing constraint files for each component in SDC format.