9 Device Configuration Register, DEVID

This register is IMPLEMENTATION DEFINED for each Part Number and Designer. The register indicates the capabilities of the component.

The DEVID register characteristics are:

Attributes
Offset

0x0FC8

Type

Read-only

Reset

0x00000-00

Width

32

The following figure shows the bit assignments.

Figure 9-306 DEVID register bit assignments
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The following table shows the bit assignments.

Table 9-317 DEVID register bit assignments

Bits Reset value Name Function
[31:11] 0x0 RES0

Reserved bit or field with Should-Be-Zero-or-Preserved (SBZP) behavior.

[10:8] IMPLEMENTATION_DEFINED MEMWIDTH

This value is twice ATB_DATA_WIDTH.

0x2

Memory interface databus is 32-bits wide.

0x3

Memory interface databus is 64-bits wide.

0x4

Memory interface databus is 128-bits wide.

0x5

Memory interface databus is 256-bits wide.

[7:6] 0b00 CONFIGTYPE

Returns 0x0, indicating ETB configuration.

[5] 0b0 CLKSCHEME

RAM Clocking Scheme. This value indicates the TMC RAM clocking scheme used, that is, whether the TMC RAM operates synchronously or asynchronously to the TMC clock. Fixed to 0 indicating that TMC RAM clock is synchronous to the clk input.

[4:0] 0b00000 ATBINPORTCOUNT

Hidden Level of ATB input multiplexing. This value indicates the type/number of ATB multiplexing present on the input ATB. Fixed to 0x00 indicating that no multiplexing is present.

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