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Home > Programmers model > css600_dp introduction > Register descriptions > Debug Port Identification Register, DPIDR |
The DPIDR provides information about the Debug Port.
The DPIDR register characteristics are:
Offset |
|
Type | Read-only |
Reset |
|
Width | 32 |
The following figure shows the bit assignments.
The following table shows the bit assignments.
Table 9-3 DPIDR register bit assignments
Bits | Reset value | Name | Function |
---|---|---|---|
[31:28] | 0b0001 |
REVISION | Revision code. |
[27:20] | 0b11000000 |
PARTNO | Part Number of the Debug Port. |
[16] | 0b1 |
MIN | Transaction counter, Pushed-verify, and Pushed-find operations are not implemented. |
[15:12] | 0b0011 |
VERSION | Version of Debug Port architecture implemented. SoC-600 is DPv3, so
the value of this field is |
[11:1] | 0b01000111011 |
DESIGNER | Designer ID based on 11-bit JEDEC JEP106 continuation and identity code. The Arm
value is |
[0] | 0b1 |
RAO | RAO. |