9 Integration Test ATB Master Control 2 register, ITATBMCTR2

This register captures the values of ATB master inputs atready_m, afvalid_m, and syncreq_m in integration mode. In functional mode, this register behaves as RAZ/WI.

The ITATBMCTR2 register characteristics are:

Attributes
Offset

0x0ED4

Type

Read-only

Reset

0x00000000

Width

32

The following figure shows the bit assignments.

Figure 9-336 ITATBMCTR2 register bit assignments
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The following table shows the bit assignments.

Table 9-348 ITATBMCTR2 register bit assignments

Bits Reset value Name Function
[31:3] 0x0 RAZ/WI

Read-As-Zero, Writes Ignored.

[2] 0b0 SYNCREQM

Integration status of syncreq_m input. In integration mode, this bit latches to 1 on a rising edge of syncreq_m input, which is cleared when this register is read or when integration mode is disabled.

[1] 0b0 AFVALIDM

Integration status of afvalid_m input. In integration mode, writes are ignored and reads return the value of afvalid_m input.

[0] 0b0 ATREADYM

Integration status of atready_m input. In integration mode, writes are ignored and reads return the value of the atready_m input.

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