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This register captures the values of ATB master inputs atready_m, afvalid_m, and syncreq_m in integration mode. In functional mode, this register behaves as RAZ/WI.
The ITATBMCTR2 register characteristics are:
The following figure shows the bit assignments.
The following table shows the bit assignments.
Table 9-348 ITATBMCTR2 register bit assignments
Read-As-Zero, Writes Ignored.
Integration status of syncreq_m input. In integration mode, this bit latches to 1 on a rising edge of syncreq_m input, which is cleared when this register is read or when integration mode is disabled.
Integration status of afvalid_m input. In integration mode, writes are ignored and reads return the value of afvalid_m input.
Integration status of atready_m input. In integration mode, writes are ignored and reads return the value of the atready_m input.