9 Integration Test ATB Master Data 0 register, ITATBMDATA0

This register enables control of the atdata_m output in integration mode. In functional mode, this register behaves as RAZ/WI. In integration mode, the value that is written to any given bit is driven on the output pin that is controlled by that bit and the reads return 0x0. The width of this register is given by 1+(ATB DATA WIDTH)/8.

The ITATBMDATA0 register characteristics are:

Attributes
Offset

0x0ED0

Type

Write-only

Reset

0x00000000

Width

32

The following figure shows the bit assignments.

Figure 9-335 ITATBMDATA0 register bit assignments
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The following table shows the bit assignments.

Table 9-347 ITATBMDATA0 register bit assignments

Bits Reset value Name Function
[31:17] 0b000000000000000 RAZ/WI

Read-As-Zero, Writes Ignored.

[16] 0b0 ATDATAMBit127

Controls the value of atdata_m[127] output in integration mode.

[15] 0b0 ATDATAMBit119

Controls the value of atdata_m[119] output in integration mode.

[14] 0b0 ATDATAMBit111

Controls the value of atdata_m[111] output in integration mode.

[13] 0b0 ATDATAMBit103

Controls the value of atdata_m[103] output in integration mode.

[12] 0b0 ATDATAMBit95

Controls the value of atdata_m[95] output in integration mode.

[11] 0b0 ATDATAMBit87

Controls the value of atdata_m[87] output in integration mode.

[10] 0b0 ATDATAMBit79

Controls the value of atdata_m[79] output in integration mode.

[9] 0b0 ATDATAMBit71

Controls the value of atdata_m[71] output in integration mode.

[8] 0b0 ATDATAMBit63

Controls the value of atdata_m[63] output in integration mode.

[7] 0b0 ATDATAMBit55

Controls the value of atdata_m[55] output in integration mode.

[6] 0b0 ATDATAMBit47

Controls the value of atdata_m[47] output in integration mode.

[5] 0b0 ATDATAMBit39

Controls the value of atdata_m[39] output in integration mode.

[4] 0b0 ATDATMBit31

Controls the value of atdata_m[31] output in integration mode.

[3] 0b0 ATDATMBit23

Controls the value of atdata_m[23] output in integration mode.

[2] 0b0 ATDATMBit15

Controls the value of atdata_m[15] output in integration mode.

[1] 0b0 ATDATMBit7

Controls the value of atdata_m[7] output in integration mode.

[0] 0b0 ATDATMBit0

Controls the value of atdata_m[0] output in integration mode.

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