9 Transfer Address Register, TAR

TAR holds the transfer address of the current transfer. TAR must be programmed before initiating any memory transfer through DRW, or Banked Data Registers, or Direct Access Registers.

The TAR register characteristics are:

Attributes
Offset

0x0D04

Type

Read-write

Reset

0x--------

Width

32

The following figure shows the bit assignments.

Figure 9-21 TAR register bit assignments
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The following table shows the bit assignments.

Table 9-23 TAR register bit assignments

Bits Reset value Name Function
[31:0] UNKNOWN Address

Address of the current transfer. When a memory access is initiated by accessing the DRW register, the TAR value directly gives the 32-bit transfer address. When a memory access is initiated by accessing Banked Data registers, the TAR only provides the upper bits [31:4] and the remaining address bits [3:0] come from the offset of Banked Data register being accessed. When a memory access is initiated by accessing Direct Access Registers, the TAR provides the upper bits [31:10] and the remaining address bits [9:0] come from the offset of the DAR being accessed.

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