9 Periodic Synchronization Counter Register, PSCR

This register determines the reload value of the Periodic Synchronization Counter. This counter enables the frequency of sync packets to be optimized to the trace capture buffer size. The default behavior of the counter is to generate periodic synchronization requests, syncreq_s, on the ATB slave interface.

The PSCR register characteristics are:

Attributes
Offset

0x0308

Type

Read-write

Reset

0x0000000A

Width

32

The following figure shows the bit assignments.

Figure 9-334 PSCR register bit assignments
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The following table shows the bit assignments.

Table 9-346 PSCR register bit assignments

Bits Reset value Name Function
[31:5] 0x0 RAZ/WI

Read-As-Zero, Writes Ignored.

[4:0] 0b01010 PSCount

Periodic Synchronization Count. Determines the reload value of the Synchronization Counter. The reload value takes effect the next time the counter reaches zero. When trace capture is enabled, the Synchronization Counter counts the number of bytes of trace data that is stored into the trace memory, regardless of whether the trace data has been formatted by the TMC or not, since the occurrence of the last sync request on the ATB slave interface. When the counter reaches 0, a sync request is sent on the ATB slave interface. Reads from this register return the reload value that is programmed in this register. This field resets to 0x0A, that is, the default sync period is 2^10 bytes. If a reserved value is programmed in this register field, the value 0x1B is used instead, and subsequent reads from this register also return 0x1B. The following constraints apply to the values written to the PSCount field: 0x0 - synchronization is disabled, 0x1-0x6 - reserved, 0x7-0x1B - synchronization period is 2^PSCount bytes. The smallest value 0x7 gives a sync period of 128 bytes. The maximum allowed value 0x1B gives a sync period of 2^27 bytes, 0x1C-0x1F - reserved.

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