9 Device Architecture Register, DEVARCH

Identifies the architect and architecture of a CoreSight component. The architect might differ from the designer of a component, for example ARM defines the architecture but another company designs and implements the component.

The DEVARCH register characteristics are:

Attributes
Offset

0x0FBC

Type

Read-only

Reset

0x00000000

Width

32

The following figure shows the bit assignments.

Figure 9-236 DEVARCH register bit assignments
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The following table shows the bit assignments.

Table 9-245 DEVARCH register bit assignments

Bits Reset value Name Function
[31:21] 0b00000000000 ARCHITECT

Returns 0.

[20] 0b0 PRESENT

Returns 0, indicating that the DEVARCH register is not present.

[19:16] 0b0000 REVISION

Returns 0

[15:0] 0x0 ARCHID

Returns 0.

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