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This register shows supported width configurations of the tracedata port. Each bit location represents a single port size that is supported, that is sizes 32 bits down to 1 bit, in bit locations [31:0]. If a bit is set, then that port size is supported. By default, the RTL is designed to support all port sizes. Port sizes, other than 1-bit, are configuration-dependent on the tie-off value of tp_maxdatasize. Bit is always 1.
The SSPSR register characteristics are:
The following figure shows the bit assignments.
The following table shows the bit assignments.
Table 9-460 SSPSR register bit assignments
Supported tracedata port sizes. Bit is always 1.