9 Mode register, MODE

This register controls the TMC operating mode. The operating mode can only be changed when the TMC is in Disabled state, that is, when CTL.TraceCaptEn = 0. Attempting to write to this register in any other state results in UNPREDICTABLE behavior. The operating mode is ignored when in Disabled state.

The MODE register characteristics are:









The following figure shows the bit assignments.

Figure 9-416 MODE register bit assignments
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The following table shows the bit assignments.

Table 9-430 MODE register bit assignments

Bits Reset value Name Function
[31:5] 0x0 RAZ/WI

Read-As-Zero, Writes Ignored.

[4] 0b0 StallOnStop

Stall On Stop. If this bit is set and the formatter stops as a result of a stop event, the output atready_s is de-asserted to stall the ATB interface and avoid loss of trace. If this bit is clear and the formatter stops as a result of a stop event, signal atready_s remains asserted but the TMC discards further incoming trace.

[3:2] 0b00 RAZ/WI

Read-As-Zero, Writes Ignored.


Fixed to 0 since TMC always operates in Circular Buffer mode in this configuration.

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