9 Formatter and Flush Status Register, FFSR

This register indicates the status of the Formatter, and the status of Flush request.

The FFSR register characteristics are:

Attributes
Offset

0x0300

Type

Read-only

Reset

0x0000000-

Width

32

The following figure shows the bit assignments.

Figure 9-332 FFSR register bit assignments
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The following table shows the bit assignments.

Table 9-344 FFSR register bit assignments

Bits Reset value Name Function
[31:2] 0x0 RAZ/WI

Read-As-Zero, Writes Ignored.

[1] UNKNOWN FtStopped

Formatter Stopped. This bit behaves the same way as STS.FtEmpty. It is cleared to 0 when leaving the Disabled state and retains its value when entering the Disabled state. The FFCR.FtStopped bit is deprecated and is present in this register to support backwards-compatibility with earlier versions of the ETB.

0

Trace capture has not yet completed.

1

Trace capture has completed and all captured trace data has been written to the trace memory.

[0] UNKNOWN FlInProg

Flush In Progress. This bit indicates whether the TMC is currently processing a flush request. In the ETB and ETR configurations, the flush initiation is controlled by the flush control bits in the FFCR register. In the ETF configuration, the flush request can also be from the ATB master interface. This bit is cleared to 0 when leaving the Disabled state and retains its value when entering the Disabled state. When in Disabled state, this bit is not updated.

0

No flush activity in progress.

1

Flush in progress on the ATB slave interface or the TMC internal pipeline.

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