9 Integration Test Trigger In and Flush In Register, ITTRFLIN

This register indicates the integration status of the flushin and trigin inputs in integration mode. Reads are allowed even in functional mode, but the register itself is disabled and does not get updated even if the inputs change. The reset value depends on the external source driving the inputs.

The ITTRFLIN register characteristics are:

Attributes
Offset

0x0EE8

Type

Read-only

Reset

0x00000000

Width

32

The following figure shows the bit assignments.

Figure 9-458 ITTRFLIN register bit assignments
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The following table shows the bit assignments.

Table 9-473 ITTRFLIN register bit assignments

Bits Reset value Name Function
[31:2] 0x0 RAZ/WI

Read-As-Zero, Writes Ignored.

[1] 0b0 FLUSHIN

In integration mode, this bit latches to 1 on a rising edge of the flushin input. It is cleared when this register is read, or when integration mode is disabled.

[0] 0b0 TRIGIN

In integration mode, this bit latches to 1 on a rising edge of the trigin input. It is cleared when this register is read or when integration mode is disabled.

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