9 Integration Test Status register, ITSTATUS

Indicates the Integration Test DP Abort status.

The ITSTATUS register characteristics are:

Attributes
Offset

0x0EFC

Type

Read-write

Reset

0x00000000

Width

32

The following figure shows the bit assignments.

Figure 9-119 ITSTATUS register bit assignments
To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


The following table shows the bit assignments.

Table 9-124 ITSTATUS register bit assignments

Bits Reset value Name Function
[31:1] 0x0 RAZ/WI

Read-As-Zero, Writes Ignored.

[0] 0b0 DPABORT

When in Integration testing mode (ITCTRL.IME=0b1): Behaves as a sticky bit and latches to 1 on a rising edge of dp_abort. Cleared on a read from this register. If dp_abort rises in the same cycle as a read of the ITSTATUS register is received, the read takes priority and the register is cleared. When in normal functional operation mode (ITCTRL.IME=0b0): Read as 0, writes ignored.

Non-ConfidentialPDF file icon PDF version100806_0300_00_en
Copyright © 2017, 2018 Arm Limited or its affiliates. All rights reserved.