9 ROM Entries register 2, ROMEntry2

Each register contains a descripter of a CoreSight component in the system. All ROM table entries conform to the same format.

The ROMEntry2 register characteristics are:

Attributes
Offset

0x0008

Type

Read-only

Reset

0x0000----

Width

32

The following figure shows the bit assignments.

Figure 9-185 ROMEntry2 register bit assignments
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The following table shows the bit assignments.

Table 9-193 ROMEntry2 register bit assignments

Bits Reset value Name Function
[31:12] IMPLEMENTATION_DEFINED BASE_ADDR

Base address of component.

[11:9] IMPLEMENTATION_DEFINED SBZ

Software should write the field as all 0s.

[8:4] IMPLEMENTATION_DEFINED POWER_DOMAIN_ID

Indicates the power domain ID of the component. Only valid if bit 2 is set. If bit 2 is clear then this field has a value of 0. Possible values are 0 to 31, representing the 32 DBGPWRUPREQ/ACK interface pins of the component.

[3] IMPLEMENTATION_DEFINED SBZ

Software should write the field as all 0s.

[2] IMPLEMENTATION_DEFINED POWER_DOMAIN_ID_VALID

Indicates whether there is a power domain ID specified in the ROM table entry.

0

POWER_DOMAIN_ID field of this register is not valid.

1

POWER_DOMAIN_ID field of this register is valid.

[1:0] IMPLEMENTATION_DEFINED PRESENT

Indicates whether the ROM table entry is present.

0x0

ROM table entry not present. This is the last entry.

0x1

Reserved.

0x2

ROM table entry not present. This is not the last entry.

0x3

ROM table entry present.

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