9 Integration Test Trigger In and Flush In register, ITTRFLIN

This register captures the values of the flushin and trigin inputs in integration mode. In functional mode, this register behaves as RAZ/WI.

The ITTRFLIN register characteristics are:

Attributes
Offset

0x0EE8

Type

Read-only

Reset

0x00000000

Width

32

The following figure shows the bit assignments.

Figure 9-421 ITTRFLIN register bit assignments
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The following table shows the bit assignments.

Table 9-435 ITTRFLIN register bit assignments

Bits Reset value Name Function
[31:2] 0x0 RAZ/WI

Read-As-Zero, Writes Ignored.

[1] 0b0 FLUSHIN

Integration status of flushin input. In integration mode, this bit latches to 1 on a rising edge of the flushin input. It is cleared when the register is read or when integration mode is disabled.

[0] 0b0 TRIGIN

Integration status of trigin input. In integration mode, this bit latches to 1 on a rising edge of the trigin input. It is cleared when the register is read or when integration mode is disabled.

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