9 Register summary

The following table shows the registers in offset order from the base memory address.

Note:

A reset value containing one or more '-' means that this register contains UNKNOWN or IMPLEMENTATION-DEFINED values. See the relevant register description for more information.

Locations that are not listed in the table are Reserved.

Table 9-123 css600_apv1adapter - APB4_Slave_0 register summary

Offset

Name

Type

Reset

Width

Description

0x0D00

Downstream reg 0

IMPLEMENTATION_DEFINED

0x--------

32

Accesses APv1 register at 0x00000D00.

0x0D04

Downstream reg 1

IMPLEMENTATION_DEFINED

0x--------

32

Accesses APv1 register at 0x00000D04.

0x0D08

Downstream reg 2

IMPLEMENTATION_DEFINED

0x--------

32

Accesses APv1 register at 0x00000D08.

0x0DFC

Downstream reg 63

IMPLEMENTATION_DEFINED

0x--------

32

Accesses APv1 register at 0x00000DFC.

0x0EFC

ITSTATUS

RW

0x00000000

32

Integration Test Status register, ITSTATUS

0x0F00

ITCTRL

RW

0x00000000

32

Integration Mode Control Register, ITCTRL

0x0FA0

CLAIMSET

RW

0x00000003

32

Claim Tag Set Register, CLAIMSET

0x0FA4

CLAIMCLR

RW

0x00000000

32

Claim Tag Clear Register, CLAIMCLR

0x0FB8

AUTHSTATUS

RO

0x00000000

32

Authentication Status Register, AUTHSTATUS

0x0FBC

DEVARCH

RO

0x47700A47

32

Device Architecture Register, DEVARCH

0x0FCC

DEVTYPE

RO

0x00000000

32

Device Type Identifier Register, DEVTYPE

0x0FD0

PIDR4

RO

0x00000004

32

Peripheral Identification Register 4, PIDR4

0x0FD4

PIDR5

RO

0x00000000

32

Peripheral Identification Register 5, PIDR5

0x0FD8

PIDR6

RO

0x00000000

32

Peripheral Identification Register 6, PIDR6

0x0FDC

PIDR7

RO

0x00000000

32

Peripheral Identification Register 7, PIDR7

0x0FE0

PIDR0

RO

0x000000E5

32

Peripheral Identification Register 0, PIDR0

0x0FE4

PIDR1

RO

0x000000B9

32

Peripheral Identification Register 1, PIDR1

0x0FE8

PIDR2

RO

0x0000000B

32

Peripheral Identification Register 2, PIDR2

0x0FEC

PIDR3

RO

0x00000000

32

Peripheral Identification Register 3, PIDR3

0x0FF0

CIDR0

RO

0x0000000D

32

Component Identification Register 0, CIDR0

0x0FF4

CIDR1

RO

0x00000090

32

Component Identification Register 1, CIDR1

0x0FF8

CIDR2

RO

0x00000005

32

Component Identification Register 2, CIDR2

0x0FFC

CIDR3

RO

0x000000B1

32

Component Identification Register 3, CIDR3

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