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Describes the subset of ARM® Compiler command-line options most likely to be of interest to users developing code to take advantage of SVE.
See the armclang Reference Guide for information about the full range of supported options.
Outputs assembly code, rather than object code.
Produces a text
containing annotated assembly code.
Performs the compilation step, but does not invoke armlink to perform the link step.
Produces an ELF object
.o file. To later link object files into an executable
armclang again, passing in
the object files.
Compiles for the specified language standard, for example
See the armclang Reference Guide for details of the supported variants, and the differences between them.
Generates code for the selected target.
ARM Compiler supports both AArch32 and AArch64 targets.
However, SVE is an extension to ARMv8-A AArch64. Therefore the only
supported target for this release is
Specifies a linker command-line option to pass to the linker when a link step is being performed after compilation.
When compiling binaries to execute on the AEMv8-A Base Fixed Virtual
Platform (FVP) base model, use this option to specify the location in
memory to load and run the binary. The RAM base address for this FVP is
0x80000000. You must therefore specify the
option for any
that performs the link stage.
Targets an architecture profile, generating generic code that runs on any processor of that architecture.
feature to enable SVE, or omit to disable.
-march=armv8.2+sve enables the ARMv8.2 architecture
profile plus SVE support.
display a list of all the supported architectures for your target.
Specifies the level of optimization to use when compiling source files.
SVE auto-vectorization occurs only at the
–O3 levels. Auto-vectorization is identical at both
–O3 results in higher
general code optimization.
–Ofast option is equivalent to
-O3 -ffp-mode=fast, and can
produce faster code if fast math optimizations are appropriate for your
-Omax option is equivalent to
-Ofast plus other aggressive
optimizations. It specifically targets performance optimization.
Enable aggressive floating-point optimizations.
The compiler can perform code optimizations and transformations that, although arithmetically correct, might not be in strict compliance with IEEE or ISO rules concerning mathematical operations.
This option can produce significantly faster code. For
example, it allows the compiler to use the SVE
FADDV instruction to perform fast parallel additions
across a vector. The
FADDV instruction is faster than the
FADDA performs all additions across the vector in
strict sequence. Take care to ensure that your algorithms do not depend
on strict IEEE or ISO mathematical rules. The optimizations applied here
are not guaranteed to produce bitwise identical results when compared
with less aggressively optimized code.