4.1.1 Code and RAM memory map

The following table shows the memory map for Code and RAM in Cortex®-M3 DesignStart™ Eval:

Table 4-1 Code and RAM memory map

Type Start End Peripheral Size Subsystem connection Comment Bit band region
Code 0x00000000 0x0003FFFF Flash 256KB TARGFLASH0 FPGA Block RAM -
0x00040000 0x003FFFFF AHB expansion - TARGEXP1 - -
0x00400000 0x007FFFFF ZBT SSRAM1 4MB TARGEXP1 User memory -
0x00800000 0x1FFFFFFF AHB expansion - TARGEXP1 - -
RAM 0x20000000 0x20007FFF SRAM0 32KB TARGSRAM0 FPGA Block RAM Yes
0x20008000 0x2000FFFF SRAM1 32KB TARGSRAM1 FPGA Block RAM Yes
0x20010000 0x20017FFF SRAM2 32KB TARGSRAM2 FPGA Block RAM Yes
0x20018000 0x2001FFFF SRAM3 32KB TARGSRAM3 FPGA Block RAM Yes
0x20020000 0x203FFFFF AHB expansion 2MB TARGEXP1 - Partial
0x20400000 0x207FFFFF ZBT SSRAM2 and ZBT SSRAM3 4MB TARGEXP1 User memory -
0x20800000 0x20FFFFFF AHB expansion 8MB AHB - -
0x21000000 0x21FFFFFF PSRAM 16MB TARGEXP1 User memory -
0x22000000 0x23FFFFFF SRAM or Expansion alias 32MB - Bit band alias -
0x24000000 0x3FFFFFFF AHB expansion - TARGEXP1 - -

Each bit in the 1MB bit band region can be accessed individually by making an access to the corresponding word in the 32MB bit band alias region. Only bit [0] is used when you make an access to the bit band alias region.

The base bit band region can be accessed directly in the same way as normal memory, using word, halfword, or byte accesses.

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