6.4.1 Testbench configuration options

You can edit the make.cfg file in the execution_tb directory to configure the execution testbench. If you change any options in make.cfg, then you must run make clean and then recompile the testbench.

The following variables control the configuration options:

Table 6-2 Configuration variables

Variables Description
DSM Determines whether to compile the obfuscated RTL or Cycle Model for the Cortex®-M3 processor. The options are:
yesCompile the Cycle Model.
noCompile the obfuscated RTL. This is the default value.
TARMAC Enables or disables Tarmac trace. The options are:
yesGenerate Tarmac trace. This is the default value.
noDisable Tarmac trace generation.
Tarmac trace is only generated if the Cycle Model is used.
SIM_64BIT Use 32-bit or 64-bit simulation. The options are:
yesUse 64-bit simulation. This is the default value.
noUse 32-bit simulation.
32-bit simulation with the Cycle Model is not supported.
SIM_VCD Enables or disables VCD waveform output. The options are:
yesEnable. The waveform output is in dump.vcd.
noDisable waveform output. This is the default value.
GUI Runs the simulation in GUI or batch mode. The options are:
yesUse GUI.
noUse batch mode. This is the default value.
FSDB Enables or disables FSDB waveform output. The options are:
yesEnable waveform output. The waveform output is in dump.fsdb.
noDisable waveform output. This is the default value.
MAX_SIMULATION_TIME

The maximum integration test time before the test timeouts and exits.

The default time is 40 000 microseconds, which is slightly longer than the longest integration test (gpio_tests). You can increase this default time, if necessary.

PLUSARGS

Allows customers to define arguments during simulation time.

There are no arguments by default.

BUILDOPTS

Allows customers to define arguments during build time.

There are no arguments by default.

SIMULATOR Defines the Verilog simulator used. The options are any of the following:
mtiMentor QuestaSim. This is the default value.
vcsSynopsys VCS.
iusCadence IUS.
TOOL_CHAIN Defines the C compiler used. The options are any of the following:
gccARM GCC. This is the default value.
ds5ARM DS-5.
keilARM Keil® MDK.

You can override the default values by doing any of the following:

  • Edit the default value in make.cfg.
  • Use the make command with an argument in the form of VARIABLE_NAME=new_value.
Non-ConfidentialPDF file icon PDF versionARM 100894_0000_00_en
Copyright © 2017 ARM Limited or its affiliates. All rights reserved.