4.3.4 Static memory interface signals for PSRAM and Ethernet peripherals

The following table describes the I/O signals for the static memory interface:

Note:

All enable, select, reset, read, and sleep signals are active-LOW.

Table 4-10 Static memory interface signals

Signal Direction Description
SMB_ETH_IRQ Input Ethernet IRQ interrupt
SMB_DQ[15:0] Input and output Data
SMB_A Output Address
SMB_ETH_nCS Output Ethernet chip select
SMB_nLB Output Lower byte select
SMB_nOE Output Output enable
SMB_nRD Output Read
SMB_nRESET Output Reset
SMB_nUB Output Upper byte select
SMB_nWE Output Write enable
SMB_PSRAM_nCE[1:0] Output PSRAM chip select
SMB_nZZ Output Sleep
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