|Non-Confidential||PDF version||ARM 100894_0000_00_en|
|Home > Introduction > About Cortex-M3 DesignStart Eval > FPGA Evaluation Flow|
The Cortex®-M3 DesignStart™ Eval FPGA Evaluation Flow allows developers to build an image file of the simulation system that can be used with the ARM Versatile Express Cortex-M Prototyping System (V2M-MPS2+). The FPGA image can be customized to the user system requirements.
The Cortex-M3 DesignStart Eval FPGA Evaluation Flow requires the purchase of the MPS2+ FPGA platform.
The MPS2+ FPGA platform includes a Motherboard Configuration Controller (MCC) on the baseboard, which provides the following features that are necessary to emulate an ARM mbed™ compliant system:
For more information on how to use the MPS2+ FPGA platform, see the ARM® Versatile Express Cortex-M Prototyping System (V2M-MPS2 and V2M-MPS2+) Technical Reference Manual.
You must not redistribute any FPGA bit files or other representations of the design that are produced from Cortex-M3 DesignStart Eval.