2.2 Adding peripherals to memory map

In the IoT subsystem included with the Cortex®-M3 DesignStart™ Eval, both the APB expansion and the FPGA peripheral APB interfaces have unused ports that can be used to add peripherals, without any modifications. If these ports are not sufficient and an existing peripheral cannot be replaced, you are required to modify at least one of the AHB interconnects in the system.

Note:

ARM recommends that:
  • The subsystem is left unmodified.
  • Only the interconnect within the fpga_peripherals hierarchy is replaced.

You can use Cortex-M System Design Kit (CMSDK) to generate an interconnect, but it is not possible to modify the subsystem. It is possible to generate a new subsystem using Cortex-M3 DesignStart Eval as an example, but you must validate any modifications to the subsystem.

Note:

Although an APB master port can be terminated using tie offs, an AHB master port must be connected to a default slave component when it is unused.
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