2.3.1 Multiple clock frequencies

A typical design implements support for different clock frequencies, coupled with the ability to gate clocks to most of the design when using the WFI and WFE instructions. Different peripheral subsystems might also use clocks that are appropriate to the performance requirements of each peripheral.

If you implement multiple clock frequencies, you might need to:

Note:

The CoreLink™ SSE-050 Subsystem provided with Cortex®-M3 DesignStart™ Pro provides bus activity signals which can be used to help with managing the control of clocks for different parts of a design.
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