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The Execution Testbench in Cortex®-M3 DesignStart™ Eval is an RTL package that allows system design and simulation with a suitable Verilog simulator.
The Cortex-M3 DesignStart Eval Execution Testbench includes:
You are expected to modify the test code to support any modifications you make to your design. You must not redistribute any test code or binaries from these deliverables unless it is developed using mbed source code.
You are only permitted to redistribute the following files (modified or original), with the original headers unchanged, and any modifications clearly identified: