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Use the MMU/MPU view to perform address translations or for an overview of the translation tables and virtual memory map.
This view enables you to:
Perform simple virtual to physical address translation.
Perform simple physical to virtual address translation.
Inspect and traverse MMU and MPU tables.
See an overview of the virtual memory map.
Freeze the view to prevent it from being updated by a running target.
For targets that support address translations, the Translation tab enables you to translate:
Virtual address to physical address.
Physical address to one or more virtual addresses.
To perform an address translation in the Translation tab:
Enter a physical or virtual address in the address field. You can also enter an expression that evaluates to an address.
Select Physical to Virtual or Virtual to Physical depending on the translation type.
Click Translate to perform the address translation.
The Result shows the output address after the translation. The view also shows the details of the translation regime and parameters. You can customize these parameters using the MMU Settings dialog.
The Tables tab displays the content of tables used by the MMU or MPU. For targets with multiple translation regimes, you can change the translation regime using the MMU Settings dialog.
For targets which support address translation, the Tables tab contains the following columns:
Specifies the input address to the translation table. This is usually the virtual address, but it can also be an intermediate physical address.
Specifies the type of entry in the translation table, for example Page Table, Section, Super Section, Small Page, or Large Page.
Specifies the output address from the translation table. This is usually the physical address, but it can also be an intermediate physical address.
Specifies the attributes for the memory region.
The Tables tab also provides additional information for each row of the translation table:
Specifies the address of the selected translation table location.
Specifies the content of the selected translation table location.
Specifies the range of input addresses that are mapped by the selected translation table location.
Specifies the Descriptor Address for the next level of lookup in the translation table.
For targets which do not support address translation, the Tables tab contains the following columns:
Specifies the memory attributes of the IDAU region.
The Memory Map tab provides a view of the virtual memory layout by combining the MMU or MPU table entries that map contiguous regions of memory with a common memory type, for example, cacheability, shareability, and access attributes.
The following options are available from the toolbar or context menu:
Links this view to the selected connection in the Debug Control view. This is the default. Alternatively you can link the view to a different connection. If the connection you want is not shown in the drop-down list, you might have to select it first in the Debug Control view.
This enables you to change the translation regime and input parameters. It contains:
The MMU Settings dialog contains:
Use this to select the translation you want the debugger to use. The field lists the translation regimes and stages that the debugger is aware of. See the ARM Architecture Reference Manual for more information on the translation regimes.
Select <Follow System> to let the debugger follow the current system state. If the current system state has more than one translation stage, then DS-5 Debugger combines the translation stages when using <Follow System>.
The following View Menu options are available:
Displays a new instance of the MMU/MPU view.
Enables the updating of the view when it is hidden behind other views. By default, this view does not update when hidden.
Refreshes the view.
Toggles the freezing of data in the current view. This also disables or enables the Refresh option.
Condenses the contiguous rows of faulty or invalid input addresses into a single row in the Tables tab.