2.5.4 Unaligned burst example

This section describes an unaligned incremental write burst of four transfers.

The figure shows an unaligned incremental write burst of four transfers, in which each row represents a transfer. The shaded cells indicate bytes that are not transferred, based on the address and byte enable attributes.

Figure 2-4 Unaligned write burst
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The data organization is the same whether this burst happens on 32-bit or on 64-bit buses.

The attributes of the TLM 2.0 GP are as follows:

m_command = TLM_WRITE_COMMAND;
m_address = 0x3;
m_data_length = 16;
m_byte_enable_length = 16;
m_byte_enable_ptr = {0x00, 0x00, 0x00, 0xFF...};
m_streaming_width = 16;

The attributes of the AMBA-PV extension are as follows:

m_burst = AMBA_PV_INCR;
m_length = 4;
m_size = 4;


This transaction is specific to the AMBA® 3 AXI bus.
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