6.4.8 Cacheability checks

This section describes the cacheability checks performed by the protocol checker.

Table 6-9 Cacheability checks performed by the protocol checker

Bus types Description of check AMBA® APB Protocol Specification AMBA 3 AHB-Lite Protocol Specification AMBA 4 AXI and ACE Protocol Specification
APB, AXI4-Lite All transactions are non-cacheable, non-bufferable. Section 2.1 AMBA® APB signals lists no signals. - Section B1.1.1 AXI4 signals not supported in AXI4-Lite
AHB Allocate attributes are not supported. - Section 2.2 Master signals lists no signals. -
AXI3, AXI4, ACE-Lite When a transaction is not modifiable then allocate attributes are not set. - - Section A4.4 “Memory types”.
APB, AHB, AXI3, AXI4, AXI4-Lite Cache coherent transactions are not supported. - - Section C1.3.2 “Changes to existing AXI channels”.
ACE-Lite, ACE A barrier transaction must have a barrier transaction type. - - Table C3-7 “Permitted read address control signal combinations”.
ACE A coherent transaction must be inner or outer shareable. - - Table C3-7 “Permitted read address control signal combinations” and Table C3-8 “Permitted write address control signal combinations”.
ACE-Lite The only permitted coherent transaction type is ReadOnce. - - Table C3-11 “ACE-Lite permitted read address control signal combinations”.
ACE, ACE-Lite A cache maintenance transaction cannot target the system domain. - - Table C3-7 “Permitted read address control signal combinations”.
ACE, ACE-Lite A DVM transaction must be inner or outer shareable. - - Table C3-7 “Permitted read address control signal combinations”.
ACE, ACE-Lite The permitted read transaction groups are Non-snooping, Coherent, Cache maintenance, Barrier and DVM. - - Table C3-7 “Permitted read address control signal combinations” and Table C3-11 “ACE-Lite permitted read address control signal combinations”.
ACE-Lite Memory update transactions are not permitted. - - Table C3-12 “ACE-Lite permitted write address control signal combinations”.
ACE A WriteClean or WriteBack transaction cannot target the system domain. - - Table C3-8 “Permitted write address control signal combinations”.
ACE An Evict transaction must be inner or outer shareable. - - Table C3-8 “Permitted write address control signal combinations”.
ACE, ACE-Lite The permitted write transaction groups are Non-snooping, Coherent, Memory update (ACE) and Barrier. - - Table C3-8 “Permitted write address control signal combinations” and Table C3-12 “ACE-Lite permitted write address control signal combinations”.
ACE Snoop transaction type must be ReadOnce, ReadShared, ReadClean, ReadNotSharedDirty, ReadUnique, CleanShared, CleanInvalid, MakeInvalid, DVMComplete or DVMMessage. - - Table C3-19 “ACSNOOP encodings”.
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