A.8.51 Special purpose registers with permanent breakpoints for vector catching with CADIBptGetList()

Fast Models enables vector catching, using permanent breakpoints on special purpose registers. CADIBptGetList() returns these breakpoints, if present, in addition to temporary ones.

Table A-1 Special purpose registers with permanent breakpoints by processor and technology

Cortex®-A and Cortex-R TrustZone® (Non-secure) TrustZone (Monitor) Virtualization
RESET - - -
UNDEFINED NS_UNDEFINED - HYP_UNDEFINED
- - - HYP_HYP
SVC NS_SVC SMC HVC
PREFETCH_ABORT NS_PREFETCH_ABORT MON_PREFETCH_ABORT HYP_PREFETCH_ABORT
DATA_ABORT NS_DATA_ABORT MON_DATA_ABORT HYP_DATA_ABORT
IRQ NS_IRQ MON_IRQ HYP_IRQ
FIQ NS_FIQ MON_FIQ HYP_FIQ

Table A-2 Special purpose registers with permanent breakpoints unique to AArch64 processors

EL + descriptor, for example S_EL1_CURRENT_SP0_SYNC.
Exception levels Descriptor
S_EL1 NS_EL1 EL2 EL3 _CURRENT_SP0_SYNC
S_EL1 NS_EL1 EL2 EL3 _CURRENT_SP0_IRQ
S_EL1 NS_EL1 EL2 EL3 _CURRENT_SP0_FIQ
S_EL1 NS_EL1 EL2 EL3 _CURRENT_SP0_ABORT
S_EL1 NS_EL1 EL2 EL3 _CURRENT_SPx_SYNC
S_EL1 NS_EL1 EL2 EL3 _CURRENT_SPx_IRQ
S_EL1 NS_EL1 EL2 EL3 _CURRENT_SPx_FIQ
S_EL1 NS_EL1 EL2 EL3 _CURRENT_SPx_ABORT
S_EL1 NS_EL1 EL2 EL3 _LOWER_64_SYNC
S_EL1 NS_EL1 EL2 EL3 _LOWER_64_IRQ
S_EL1 NS_EL1 EL2 EL3 _LOWER_64_FIQ
S_EL1 NS_EL1 EL2 EL3 _LOWER_64_ABORT
S_EL1 NS_EL1 EL2 EL3 _LOWER_32_SYNC
S_EL1 NS_EL1 EL2 EL3 _LOWER_32_IRQ
S_EL1 NS_EL1 EL2 EL3 _LOWER_32_FIQ
S_EL1 NS_EL1 EL2 EL3 _LOWER_32_ABORT
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