3.9.46 PL180_MCI

ARM PrimeCell Multimedia Card Interface (PL180). This model is written in LISA+.

PL180_MCI contains the following CADI targets:

  • PL180_MCI

PL180_MCI contains the following MTI components:

About PL180_MCI

When paired with an MMC card model, the PL180_MCI component provides emulation of a flexible, persistent storage mechanism. The PL180_MCI component fully models the registers of the corresponding PrimeCell, but supports a subset of the functionality of the PL180:

  • The controller supports block mode transfers, but does not currently support streaming data transfer.
  • The controller can be attached to a single MMC device. The MMC bus mode and SDIO modes of the PL180 PrimeCell are not supported.
  • Command and Data timeouts are not simulated.
  • Payload CRC errors are not simulated.
  • The DMA interface present in the PL180 PrimeCell is not modeled.
  • Minimal timing is implemented within the model.


At compile time, you can enable command tracing within the PL180_MCI component by modifying the PL180_TRACE macro in the MMC.lisa file. This sends command and event trace to standard output. You can use this output to help diagnose device driver and controller-to-card protocol issues.

Table 3-379 Ports

Name Protocol Type Description
MCIINTR[2] Signal Master Interrupts.
mmc_m MMC_Protocol Master The MultiMediaCard (MMC) master port.
pvbus PVBus Slave Slave port for register access.

Table 3-380 Parameters for PL180_MCI

Name Type Default value Description
pl180_fifo_depth int 0x10 PL180 FIFO Depth
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