3.7.29 RemapDecoder

The component that provides support for dynamically remappable regions of memory. This model is written in LISA+.

RemapDecoder contains the following CADI targets:

  • RemapDecoder
  • TZSwitch

RemapDecoder contains the following MTI components:

Table 3-260 Ports

Name Protocol Type Description
control TZSwitchControl Broadcast -
input PVBus Slave Incoming bus transactions (connected straight to TZSwitch).
output_remap_clear PVBus Master Outgoing bus transactions when remap is clear.
output_remap_set PVBus Master Outgoing bus transactions when remap is set.
remap StateSignal Slave Remapping control.

Table 3-261 Parameters for TZSwitch

Name Type Default value Description
normal int 0x2 Normal Port
secure int 0x1 Secure Port
Non-ConfidentialPDF file icon PDF version100964_1110_00_en
Copyright © 2014–2020 Arm Limited or its affiliates. All rights reserved.