3.9.31 MMU_500

MMU-500 component. This model is written in LISA+.

MMU_500 contains the following CADI targets:

  • MMU_500
  • MMU_500_BASE

MMU_500 contains the following MTI components:

About MMU_500

This is a model of a basic MMU-500. Set the version using the version parameter.

You cannot arbitrarily configure how you derive StreamIDs and SSD_Indexes from the transaction attributes.

This component has two label modes which you select using the parameter use_label_mapping:

  • Set use_label_mapping to true if your upstream devices have labels in the top 16 bits of the transaction MasterID.


    The model does not have a concept of AXI-ID, but a transaction can have a MasterID set on it.

    Label your upstream components 0…N so that the parameters of this component can map those integers to StreamID and SSD_Index.

  • Set use_label_mapping to false if the StreamID is encoded in the top 16 bits of the MasterID and the bottom 16 bits encode either the SSD_Index or the SSD state directly, depending on use_ssd_determination_table:

    • If use_ssd_determination_table is true, the bottom 16 bits of the MasterID encode the SSD_Index. They must be < 2^ssd_index_width.
    • If use_ssd_determination_table is false, the bottom 16 bits of the MasterID encode the SSD state directly, where zero is Secure and nonzero is Non-secure.

    Typically in hardware, a device emits different AXI-IDs, depending on what it is doing. In the model, MasterIDs are usually not diverse and a device might only emit one MasterID.

This component models the registers as follows:

  • It models all architectural registers that the Technical Reference Manual (TRM) specifies, except that it does not model any of the performance registers.

  • Unlike the MMU-400, MMU-500 does have an SMMU_STLBGSTATUS register because it has stage 1 and stage 2 support.

  • The SMMU_NSACR is an alias of the Non-secure SMMU_ACR. This component models SMMU_ACR as RAZ/WI.

  • The *ACR registers have IMP DEF contents. This component models only the PAGESIZE bit of the SACR, as non-RAZ/WI. It models no other IMP DEF registers.

Table 3-350 Ports

Name Protocol Type Description
cfg_cttw_in Signal Slave Enables coherent page table walks.
comb_irpt_ns Signal Master Non-secure combined interrupt.
comb_irpt_s Signal Master Secure combined interrupt.
cxt_irpt[128] Signal Master Context interrupt.
glbl_flt_irpt_ns Signal Master Global Non-secure fault interrupt.
glbl_flt_irpt_s Signal Master Global Secure fault interrupt.
priv_internals MMU_500_Internals Slave For internal use only, please do not use.
pvbus_control_s PVBus Slave Provides memory-mapped read write access to the control registers of the module.
pvbus_m[32] PVBus Master For all memory accesses. One for each Translation Buffer Unit (TBU).
pvbus_ptw_m PVBus Master If ptw_has_separate_port is true, use for page table walks.
pvbus_s[32] PVBus Slave For transactions from PVBus master/decoder. One for each TBU.
reset_in Signal Slave Reset signal.

Table 3-351 Parameters for MMU_500

Name Type Default value Description
always_secure_ssd_indices string "" Non-programmable SSD Indexes that are always secure (e.g. 0, 6, 35-64).
cfg_cttw bool 0x1 Perform coherent page table walks
dump_unpredictablity_in_user_flags bool 0x0 Override the user flags to encode unpredictable information (validation only)
label0_read_ssd int 0x0 Label0: Read SDD or SSD_Index
label0_read_stream_id int 0x0 Label0: Read Stream ID
label0_write_ssd int 0x0 Label0: Write SDD or SSD_Index
label0_write_stream_id int 0x0 Label0: Write Stream ID
label10_read_ssd int 0x0 Label10: Read SDD or SSD_Index
label10_read_stream_id int 0x0 Label10: Read Stream ID
label10_write_ssd int 0x0 Label10: Write SDD or SSD_Index
label10_write_stream_id int 0x0 Label10: Write Stream ID
label11_read_ssd int 0x0 Label11: Read SDD or SSD_Index
label11_read_stream_id int 0x0 Label11: Read Stream ID
label11_write_ssd int 0x0 Label11: Write SDD or SSD_Index
label11_write_stream_id int 0x0 Label11: Write Stream ID
label12_read_ssd int 0x0 Label12: Read SDD or SSD_Index
label12_read_stream_id int 0x0 Label12: Read Stream ID
label12_write_ssd int 0x0 Label12: Write SDD or SSD_Index
label12_write_stream_id int 0x0 Label12: Write Stream ID
label13_read_ssd int 0x0 Label13: Read SDD or SSD_Index
label13_read_stream_id int 0x0 Label13: Read Stream ID
label13_write_ssd int 0x0 Label13: Write SDD or SSD_Index
label13_write_stream_id int 0x0 Label13: Write Stream ID
label14_read_ssd int 0x0 Label14: Read SDD or SSD_Index
label14_read_stream_id int 0x0 Label14: Read Stream ID
label14_write_ssd int 0x0 Label14: Write SDD or SSD_Index
label14_write_stream_id int 0x0 Label14: Write Stream ID
label15_read_ssd int 0x0 Label15: Read SDD or SSD_Index
label15_read_stream_id int 0x0 Label15: Read Stream ID
label15_write_ssd int 0x0 Label15: Write SDD or SSD_Index
label15_write_stream_id int 0x0 Label15: Write Stream ID
label16_read_ssd int 0x0 Label16: Read SDD or SSD_Index
label16_read_stream_id int 0x0 Label16: Read Stream ID
label16_write_ssd int 0x0 Label16: Write SDD or SSD_Index
label16_write_stream_id int 0x0 Label16: Write Stream ID
label17_read_ssd int 0x0 Label17: Read SDD or SSD_Index
label17_read_stream_id int 0x0 Label17: Read Stream ID
label17_write_ssd int 0x0 Label17: Write SDD or SSD_Index
label17_write_stream_id int 0x0 Label17: Write Stream ID
label18_read_ssd int 0x0 Label18: Read SDD or SSD_Index
label18_read_stream_id int 0x0 Label18: Read Stream ID
label18_write_ssd int 0x0 Label18: Write SDD or SSD_Index
label18_write_stream_id int 0x0 Label18: Write Stream ID
label19_read_ssd int 0x0 Label19: Read SDD or SSD_Index
label19_read_stream_id int 0x0 Label19: Read Stream ID
label19_write_ssd int 0x0 Label19: Write SDD or SSD_Index
label19_write_stream_id int 0x0 Label19: Write Stream ID
label1_read_ssd int 0x0 Label1: Read SDD or SSD_Index
label1_read_stream_id int 0x0 Label1: Read Stream ID
label1_write_ssd int 0x0 Label1: Write SDD or SSD_Index
label1_write_stream_id int 0x0 Label1: Write Stream ID
label20_read_ssd int 0x0 Label20: Read SDD or SSD_Index
label20_read_stream_id int 0x0 Label20: Read Stream ID
label20_write_ssd int 0x0 Label20: Write SDD or SSD_Index
label20_write_stream_id int 0x0 Label20: Write Stream ID
label21_read_ssd int 0x0 Label21: Read SDD or SSD_Index
label21_read_stream_id int 0x0 Label21: Read Stream ID
label21_write_ssd int 0x0 Label21: Write SDD or SSD_Index
label21_write_stream_id int 0x0 Label21: Write Stream ID
label22_read_ssd int 0x0 Label22: Read SDD or SSD_Index
label22_read_stream_id int 0x0 Label22: Read Stream ID
label22_write_ssd int 0x0 Label22: Write SDD or SSD_Index
label22_write_stream_id int 0x0 Label22: Write Stream ID
label23_read_ssd int 0x0 Label23: Read SDD or SSD_Index
label23_read_stream_id int 0x0 Label23: Read Stream ID
label23_write_ssd int 0x0 Label23: Write SDD or SSD_Index
label23_write_stream_id int 0x0 Label23: Write Stream ID
label24_read_ssd int 0x0 Label24: Read SDD or SSD_Index
label24_read_stream_id int 0x0 Label24: Read Stream ID
label24_write_ssd int 0x0 Label24: Write SDD or SSD_Index
label24_write_stream_id int 0x0 Label24: Write Stream ID
label25_read_ssd int 0x0 Label25: Read SDD or SSD_Index
label25_read_stream_id int 0x0 Label25: Read Stream ID
label25_write_ssd int 0x0 Label25: Write SDD or SSD_Index
label25_write_stream_id int 0x0 Label25: Write Stream ID
label26_read_ssd int 0x0 Label26: Read SDD or SSD_Index
label26_read_stream_id int 0x0 Label26: Read Stream ID
label26_write_ssd int 0x0 Label26: Write SDD or SSD_Index
label26_write_stream_id int 0x0 Label26: Write Stream ID
label27_read_ssd int 0x0 Label27: Read SDD or SSD_Index
label27_read_stream_id int 0x0 Label27: Read Stream ID
label27_write_ssd int 0x0 Label27: Write SDD or SSD_Index
label27_write_stream_id int 0x0 Label27: Write Stream ID
label28_read_ssd int 0x0 Label28: Read SDD or SSD_Index
label28_read_stream_id int 0x0 Label28: Read Stream ID
label28_write_ssd int 0x0 Label28: Write SDD or SSD_Index
label28_write_stream_id int 0x0 Label28: Write Stream ID
label29_read_ssd int 0x0 Label29: Read SDD or SSD_Index
label29_read_stream_id int 0x0 Label29: Read Stream ID
label29_write_ssd int 0x0 Label29: Write SDD or SSD_Index
label29_write_stream_id int 0x0 Label29: Write Stream ID
label2_read_ssd int 0x0 Label2: Read SDD or SSD_Index
label2_read_stream_id int 0x0 Label2: Read Stream ID
label2_write_ssd int 0x0 Label2: Write SDD or SSD_Index
label2_write_stream_id int 0x0 Label2: Write Stream ID
label30_read_ssd int 0x0 Label30: Read SDD or SSD_Index
label30_read_stream_id int 0x0 Label30: Read Stream ID
label30_write_ssd int 0x0 Label30: Write SDD or SSD_Index
label30_write_stream_id int 0x0 Label30: Write Stream ID
label31_read_ssd int 0x0 Label31: Read SDD or SSD_Index
label31_read_stream_id int 0x0 Label31: Read Stream ID
label31_write_ssd int 0x0 Label31: Write SDD or SSD_Index
label31_write_stream_id int 0x0 Label31: Write Stream ID
label3_read_ssd int 0x0 Label3: Read SDD or SSD_Index
label3_read_stream_id int 0x0 Label3: Read Stream ID
label3_write_ssd int 0x0 Label3: Write SDD or SSD_Index
label3_write_stream_id int 0x0 Label3: Write Stream ID
label4_read_ssd int 0x0 Label4: Read SDD or SSD_Index
label4_read_stream_id int 0x0 Label4: Read Stream ID
label4_write_ssd int 0x0 Label4: Write SDD or SSD_Index
label4_write_stream_id int 0x0 Label4: Write Stream ID
label5_read_ssd int 0x0 Label5: Read SDD or SSD_Index
label5_read_stream_id int 0x0 Label5: Read Stream ID
label5_write_ssd int 0x0 Label5: Write SDD or SSD_Index
label5_write_stream_id int 0x0 Label5: Write Stream ID
label6_read_ssd int 0x0 Label6: Read SDD or SSD_Index
label6_read_stream_id int 0x0 Label6: Read Stream ID
label6_write_ssd int 0x0 Label6: Write SDD or SSD_Index
label6_write_stream_id int 0x0 Label6: Write Stream ID
label7_read_ssd int 0x0 Label7: Read SDD or SSD_Index
label7_read_stream_id int 0x0 Label7: Read Stream ID
label7_write_ssd int 0x0 Label7: Write SDD or SSD_Index
label7_write_stream_id int 0x0 Label7: Write Stream ID
label8_read_ssd int 0x0 Label8: Read SDD or SSD_Index
label8_read_stream_id int 0x0 Label8: Read Stream ID
label8_write_ssd int 0x0 Label8: Write SDD or SSD_Index
label8_write_stream_id int 0x0 Label8: Write Stream ID
label9_read_ssd int 0x0 Label9: Read SDD or SSD_Index
label9_read_stream_id int 0x0 Label9: Read Stream ID
label9_write_ssd int 0x0 Label9: Write SDD or SSD_Index
label9_write_stream_id int 0x0 Label9: Write Stream ID
number_of_contexts int 0x8 Number of context banks
number_of_smrs int 0x20 Number of stream match registers.
percent_tlbstatus_commits int 0xa Percentage of times that a poll of TLBSTATUS will commit the TLBI commands
prefetch_only_requests int 0x0 Handle prefetch-only requests by:- 0 -- deny them 1 -- use debug table walks and TLB entries 2 -- treat them as normal transactions (dangerous)
programmable_non_secure_by_default_ssd_indices string "" Programmable SSD Indexes that are by default non-secure (e.g. 0, 6, 35-84).
programmable_secure_by_default_ssd_indices string "" Programmable SSD Indexes that are by default secure (e.g. 0, 6, 35-84).
ptw_has_separate_port bool 0x1 Page Table Walks use pvbus_ptw_m
supports_nested_translations bool 0x1 Supports nested translations (stage 1 + stage 2)
tlb_depth int 0x800 TLB Depth (0 means 10000). The model will perform best with more TLB entries.
use_label_mapping bool 0x1 Use label mapping
use_ssd_determination_table bool 0x1 Use SSD Determination Table
version string "EAC" Version of the RTL that the model represents. Valid values are LACr1 and EAC.

Table 3-352 Parameters for MMU_500_BASE

Name Type Default value Description
mmu.PRIVATE_PARAMETER_personality string "" The personality to use (affects ID codes and various imp def features).
mmu.PRIVATE_PARAMETER_seed int 0x12345678 Seed for randomised SMMU implementation defined behaviour
mmu.PRIVATE_PARAMETER_validation_mode int 0x0 Internal validation mode.
mmu.always_secure_ssd_indices string "" Non-programmable SSD Indexes that are always secure (e.g. 0, 6, 35-64).
mmu.cfg_cttw bool 0x1 Perform coherent page table walks
mmu.dump_unpredictablity_in_user_flags bool 0x0 Override the user flags to encode unpredictable information (validation only)
mmu.number_of_contexts int 0x8 Number of context banks
mmu.number_of_smrs int 0x10 Number of stream match registers.
mmu.percent_tlbstatus_commits int 0xa Percentage of times that a poll of TLBSTATUS will commit the TLBI commands
mmu.prefetch_only_requests int 0x0 Handle prefetch-only requests by:- 0 -- deny them 1 -- use debug table walks and TLB entries 2 -- treat them as normal transactions (dangerous)
mmu.programmable_non_secure_by_default_ssd_indices string "" Programmable SSD Indexes that are by default non-secure (e.g. 0, 6, 35-84).
mmu.programmable_secure_by_default_ssd_indices string "" Programmable SSD Indexes that are by default secure (e.g. 0, 6, 35-84).
mmu.ptw_has_separate_port bool 0x1 Page Table Walks use pvbus_ptw_m (or uses pvbus_m[0])
mmu.supports_nested_translations bool 0x1 Supports nested translations (stage 1 + stage 2)
mmu.tlb_depth int 0x800 TLB Depth (0 means 10000). The model will perform best with more TLB entries.
mmu.use_ssd_determination_table bool 0x1 Use SSD Determination Table
mmu.version string "EAC" Version of the RTL that the model represents. Valid values are LACr1 and EAC.
Non-ConfidentialPDF file icon PDF version100964_1110_00_en
Copyright © 2014–2020 Arm Limited or its affiliates. All rights reserved.