3.9.13 DMC500

ARM Dynamic Memory Controller(DMC500). This model is written in C++.

DMC500 contains the following CADI targets:

  • DMC500

DMC500 contains the following MTI components:

About DMC500

A platform can have multiple instances of this component. For example:

//LISA instantiation
    // Memory controllers
    dmc0    : DMC500("default_region_attributes"=dmc_default_region_attributes,
    dmc1    : DMC500("default_region_attributes"=dmc_default_region_attributes,

Differences between the model and the RTL

The model has the following limitations:

  • It does not support address striping.
  • It works with linear addresses and not in rank,bank,row,column form.
  • It does not include any mechanism for error injection or detection.
  • Scrubbing functionality is only provided from the interface point of view.
  • It does not implement direct read or write commands.
  • It does not implement any performance counters.
  • All OR'd interrupt signals are missing from this release of the model. Users can connect the failed access interrupt as a substitute.
  • The model combines separate failed access interrupts for system interfaces 1 and 2 into a single failed access interrupt.
  • DMC-500 has three separate reset signals whereas this model has a single reset signal which supports the combined assertion of three resets. This model does not support separate reset signals.

Table 3-313 Ports

Name Protocol Type Description
apb_pvbus_s PVBus Slave Programmers interface to program and control the DMC-500.
failed_access_interrupt_signal Signal Master The DMC has detected a system request that has failed a permissions check and a previously detected assertion was not cleared.
filter_pvbus_m PVBus Master DMC master port from System Interface 0 to memory.
filter_pvbus_s PVBus Slave System interface 0. Generally, Non-coherent Interface.
reset_signal Signal Slave DMC reset.
si1_filter_pvbus_m PVBus Master DMC master port from System Interface 1 to memory.
si1_filter_pvbus_s PVBus Slave System interface 1. Generally, Coherent Interface.
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