3.9.31 MemoryMappedCounterModule

Memory Mapped Counter Module for Generic Timers. This model is written in C++.

MemoryMappedCounterModule contains the following CADI targets:

  • MemoryMappedCounterModule

MemoryMappedCounterModule contains the following MTI components:

MemoryMappedCounterModule - about

This component must be used by multicluster models. It also must be used to run a single core system with a timer that runs at a rate other than the input clock to the core.

Note:

The component has two bus slave ports because the architecture specification permits you to map each set of registers at different, non-contiguous base addresses.

Table 3-323 Ports

Name Protocol Type Description
clk_in ClockSignal Slave This clock input determines the frequency of the Physical Count provided to the clusters connected to the cntvalueb port.
cntvalueb 2.6.1 CounterInterface protocol Master This master port implements a private protocol between the cluster and the MemoryMappedCounterModule. This must be connected to the cntvalueb port on each cluster in the system and to the MemoryMappedCounterModule component.
counter_reset 2.7.2 Signal protocol Slave Resets when set.
pvbus_control_s PVBus Slave This slave port provides memory-mapped read write access to the control registers of the module.
pvbus_read_s PVBus Slave This slave port provides memory-mapped read access to the status frame registers.

Table 3-324 Parameters for MemoryMappedCounterModule

Name Type Default value Description
base_frequency int 0x5f5e100 Reset value for CNTFID0, base frequency in Hz
cntcidr0123_C int 0x0 Values to be returned for control-frame CIDR registers
cntcidr0123_R int 0x0 Values to be returned for read-frame CIDR registers
cntpidr0123_C int 0x0 Values to be returned for control-frame PIDR registers 0-3
cntpidr0123_R int 0x0 Values to be returned for read-frame PIDR registers 0-3
cntpidr4567_C int 0x0 Values to be returned for control-frame PIDR registers 4-7
cntpidr4567_R int 0x0 Values to be returned for read-frame PIDR registers 4-7
diagnostics int 0x0 Diagnostics
has_counter_scaling bool 0x0 Implements ARMv8.4 generic counter scaling
non_arch_fixed_frequency int 0x0 If set, ignore CNTFID0 and instead use this frequency in Hz
non_arch_start_at_default bool 0x0 Firmware is expected to enable the timer at boot time. However, turning this parameter on is a model-specific way of enabling the counter module out of reset.
readonly_is_WI bool 0x0 Ignore (rather than failing) on writes to read-frame
use_real_time bool 0x0 Update the Generic Timer counter at a real-time base frequency instead of simulator time
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