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Home > Fast Models components > SystemIP components > SP810_SysCtrl |
PrimeXsys System Controller(SP810) NB: Only EB relevant functionalities are fully implemented. This model is written in LISA+.
SP810_SysCtrl contains the following CADI targets:
SP810_SysCtrl contains the following MTI components:
Table 3-372 Ports
Name | Protocol | Type | Description |
---|---|---|---|
clk_in |
ClockSignal |
Slave | Clock input. |
hclkdivsel |
2.7.6 ValueState protocol |
Master | Define the processor clock/bus clock ratio. Not fully implemented. Using this port has unpredictable results. |
npor |
2.7.2 Signal protocol |
Slave | Power on reset. Not fully implemented. Using this port has unpredictable results. |
pll_en |
2.7.2 Signal protocol |
Master | PLL enable output. Not fully implemented. Using this port has unpredictable results. |
pvbus |
PVBus |
Slave | Slave port for register access. |
ref_clk_in |
ClockSignal |
Slave | Clock source used by the Timer and Watchdog modules. |
remap_clear |
2.7.3 StateSignal protocol |
Master | Remap clear request output. |
remap_stat |
2.7.3 StateSignal protocol |
Slave | Remap status input. Not fully implemented. Using this port has unpredictable results. |
sleep_mode |
2.7.2 Signal protocol |
Master | Control clocks for SLEEP mode. Not fully implemented. Using this port has unpredictable results. |
sys_id |
2.7.6 ValueState protocol |
Slave | Unused port. |
sys_mode |
2.7.6 ValueState protocol |
Slave | Present system mode. Not fully implemented. Using this port has unpredictable results. |
sys_stat |
2.7.6 ValueState protocol |
Slave | System status input. Not fully implemented. Using this port has unpredictable results. |
timer_clk_en[4] |
2.2.2 ClockRateControl protocol |
Master | Timer clock enable n. |
wd_clk_en |
2.7.2 Signal protocol |
Master | Watchdog module clock enable output. Not fully implemented. Using this port has unpredictable results. |
wd_en |
2.7.2 Signal protocol |
Slave | Watchdog module enable input. Not fully implemented. Using this port has unpredictable results. |
Table 3-373 Parameters for SP810_SysCtrl
Name | Type | Default value | Description |
---|---|---|---|
sysid |
int |
0x0 |
System Identification Register. |
use_s8 |
bool |
0x0 |
Use Switch 8 (S1-S4) |