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The PV models implement Translation Lookaside Buffers (TLBs) and model most aspects of TLB behavior.
device-accurate-tlbparameter is set to
false, the simulation uses a different number of TLBs if this improves simulation performance. The simulation is architecturally accurate, but not device accurate. Architectural accuracy is almost always sufficient. Set
trueif you require device accuracy.
These TLB registers do not have working implementations:
In addition, the simulation does not distinguish peripheral accesses from data accesses, so it ignores configuration of the peripheral port memory remap register.