9.8.2 Memory aliasing

The model implements address-space aliasing of the DRAM. This means that the same physical memory locations are visible at different addresses.

The lower 2GB of the DRAM is accessible at 0x00_80000000. The full 4GB of DRAM is accessible at 0x08_00000000 and again at 0x80_00000000. The aliasing of DRAM then repeats from 0x81_00000000 up to 0xFF_FFFFFFFF.

Non-ConfidentialPDF file icon PDF version100964_1142_00_en
Copyright © 2014–2018 Arm Limited or its affiliates. All rights reserved.