5.15.6 Cache maintenance trace

If enabled, this source traces all cache maintenance operations that the processor initiates.

Output syntax:

<time> <scale> <cpu> CACHE MAINTENANCE <side> <operation> <scope> <data> {<pagesize> <memtype>}
<time>

Timestamp (decimal value).

<scale>

Unit for <time>. clk indicates that the timestamp is not related to real time, but an increasing count.

<cpu>

Processor, or other component, that gave the instruction.

<side>
Data or instruction cache.
<operation>
Clean, invalidate, or both.
<scope>
By MVA or set/way, to Point of Coherency or Point of Unification, Inner Sharable or not.
<data>
Data that is associated with the operation. If the operation is by MVA, format according to the common address definition, otherwise use raw hexadecimal.
<pagesize>
If the operation is by MVA, this element is the size of the memory region that is described by the TLB entry which contains the MVA.
<memtype>
If the operation is by MVA, this element is the type of memory in the TLB entry which contains the MVA.
Non-ConfidentialPDF file icon PDF version100964_1142_00_en
Copyright © 2014–2018 Arm Limited or its affiliates. All rights reserved.