9.4 VE - interrupt assignments for Cortex®‑A series

The platform routes the following Shared Peripheral Interrupts (SPIs) to the GIC.

Table 9-6 SPI GIC assignments

IRQ ID SPI offset Device
32 0 Watchdog, SP805
34 2 Dual timer 0/1, SP804
35 3 Dual timer 2/3, SP804
36 4 Real-time Clock, PL031
37 5 UART0, PL011
38 6 UART1, PL011
39 7 UART2, PL011
40 8 UART3, PL011
41 9 MCI, PL180, MCIINTR0
42 10 MCI, PL180, MCIINTR1
43 11 AACI, PL041
44 12 KMI - Keyboard, PL050
45 13 KMI - Mouse, PL050
46 14 Color LCD Controller, PL111
47 15 Ethernet, SMSC 91C111
74 42 Virtio block device
75 43 Virtio P9 device
92 60 CPU 0 PMU
93 61 CPU 1 PMU
94 62 CPU 2 PMU
95 63 CPU 3 PMU
117 85 HDLCD
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