3.10.60 SP804_Timer

ARM Dual-Timer Module(SP804). This model is written in LISA+.

SP804_Timer contains the following CADI targets:

  • ClockDivider
  • CounterModule
  • SP804_Timer

SP804_Timer contains the following MTI components:

Table 3-395 Ports

Name Protocol Type Description
clock ClockSignal Slave Clock input, typically 1MHz, driving master count rate.
irq_out0 Signal Master Interrupt signaling.
irq_out1 Signal Master Interrupt signaling.
pvbus PVBus Slave Slave port for register access.
timer_en[2] ClockRateControl Slave Port for changing the rate of timer n.
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