5.15.10 Event trace

If enabled, this source traces exceptions, interrupts, and exception returns. In AArch64, it also traces changes to the SPSel and to the current exception level, by generating a CoreEvent_ModeChange.

Output syntax:

<time> <scale> {<cpu>} E <value> {<mode>} {<value1>} <number> <desc>

<time>

Timestamp (decimal value).

<scale>

Unit for <time>, which gives consistency with device-specific Tarmac Trace formats.

<cpu>

Processor, or other component, that gave the instruction.

<value>

A value that is associated with the event. Format according to the common address definition.

<mode>
For mode change events only, the new mode being entered.
<value1>
Where available, the hexadecimal representation of a second value that is associated with the event.
<number>

Event number.

<desc>

Event name.

Table 5-17 Supported values for value, number, and desc

Number

Event description

Value

0x00000001

CoreEvent_Reset

-

0x00000002

CoreEvent_UndefinedInstr

-

0x00000003

CoreEvent_SWI

SWI number

0x00000004

CoreEvent_PrefetchAbort

-

0x00000005

CoreEvent_DataAbort

-

0x00000007

CoreEvent_IRQ

-

0x00000008

CoreEvent_FIQ

-

0x0000000E

CoreEvent_ImpDataAbort

-

0x00000019

CoreEvent_ModeChange

New mode

0x00000080

CoreEvent_CURRENT_SP0_SYNC

-

0x00000081

CoreEvent_CURRENT_SP0_IRQ

-

0x00000082

CoreEvent_CURRENT_SP0_FIQ

-

0x00000083

CoreEvent_CURRENT_SP0_ABORT

-

0x00000084

CoreEvent_CURRENT_SPx_SYNC

-

0x00000085

CoreEvent_CURRENT_SPx_IRQ

-

0x00000086

CoreEvent_CURRENT_SPx_FIQ

-

0x00000087

CoreEvent_CURRENT_SPx_ABORT

-

0x00000088

CoreEvent_LOWER_64_SYNC

-

0x00000089

CoreEvent_LOWER_64_IRQ

-

0x0000008A

CoreEvent_LOWER_64_FIQ

-

0x0000008B

CoreEvent_LOWER_64_ABORT

-

0x0000008C

CoreEvent_LOWER_32_SYNC

-

0x0000008D

CoreEvent_LOWER_32_IRQ

-

0x0000008E

CoreEvent_LOWER_32_FIQ

-

0x0000008F

CoreEvent_LOWER_32_ABORT

-

Note:

The CoreEvent_CURRENT_* and CoreEvent_LOWER_* events cover all the ways in which exception entry can happen in AArch64 state. For example, CoreEvent_CURRENT_SPx_SYNC corresponds to a synchronous exception taken from Current Exception level with SP_ELx, x>0. CoreEvent_LOWER_64_IRQ corresponds to an IRQ or vIRQ taken from Lower Exception level, where the implemented level immediately lower than the target level is using AArch64.
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