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The CADI/Synchronous CADI (SCADI) interfaces of processor components support watchpoints. Memory components like RAMDevice do not.
When the simulator hits a watchpoint, the CADI/SCADI interface
emits a sequence, typically only one, of
bptNumber) callbacks, where
the breakpoint ID of the watchpoint. After this sequence it sends
Only after the debugger receives this
might it inspect the state of the model.
You can read additional information about the last of the hit watchpoints
from these CADI registers declared by the processor in register group
These registers are not memory (or CPnn-) mapped anywhere and are not
accessible to target programs. These registers are read-only.
memoryBptAccessVA are 32 or 64 bit depending on the architecture.
memoryBptAccessRW are 32
When multiple accesses have hit watchpoints at the same time, for example during the same instruction, the information contained in these registers is valid and consistent only for one of these accesses.
Whenever at least one CADI watchpoint is set on a processor, the syncLevel on that processor is at least 2.