9.1 Timing annotation

Timing annotation enables you to perform high-level performance estimation on Fast Models.

Fast Models are Programmers View (PV) models that are targeted at software development. They sacrifice timing accuracy to achieve fast simulation execution speeds. By default, each instruction takes a single simulator clock cycle, with no delays for memory accesses.

Timing annotation enables you to perform more accurate performance estimation on SystemC models with minimal simulation performance impact. You can use it to show performance trends and to identify test cases for further analysis on approximately timed or cycle-accurate models.

You can configure the following aspects of timing annotation:


Timing annotation is supported on all SystemC-based platforms. However, it is disabled by default on SystemC ISIMs. To enable timing annotation for a SystemC ISIM, set the environment variable FASTSIM_DISABLE_TA to 0.
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