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SystemC Export wraps the components of a SystemC-based virtual platform into an Exported Virtual Subsystem (EVS). Multiple Instantiation (MI) enables the generation and integration of multiple EVS instances into a single SystemC simulation.
SystemC Export with MI enables the generation of EVSs as first-class SystemC components:
SC_THREADper core component (that is, one
SC_THREADper core component in a cluster Code Translation (CT) model).
MI enables the generation and integration of multiple EVS instances into a virtual platform with SystemC as the single simulation domain. A single EVS can appear in multiple virtual platforms. Equally, multiple EVSs can combine to create a single platform.
SystemC components (including Fast Models ones) can exchange data via the Direct Memory Interface (DMI) or normal (blocking) Transaction Level Modeling (TLM) transactions.
Fast Models supports SystemC 2.3.2, including integrated TLM 2.0.4. In this version, the TLM and SystemC headers are in the same place, and some filenames are different.
If you use them, set
TLM_HOME to valid directories when running
simgen. If the "include" directories do not
simgen runs, they cannot be in the include
When loading an image on an EVS, you might see the following warning:
Warning: Base.cluster0.cpu0: Uncaught exception, thread terminated In file: gen/scx_scheduler_mapping.cpp:523 In process: Base.thread_p_5 @ 0 s
This warning means that the image is attempting to run from DRAM, but
this is access-controlled by the TZC_400 component. To disable security checking by the
Base.bp.secure_memory=false when running the EVS.