3.2 Register summary

The following table lists the registers in the TRNG.

Table 3-2 TRNG register summary

Offset Name Accessa Reset value Description
0x000-0x0FC - - - Reserved.
0x100 RNG_IMR RWs 0x0000000F 3.3 Interrupt Mask Register, RNG_IMR
0x104 RNG_ISR RO 0x00000000 3.4 Interrupt Status Register, RNG_ISR
0x108 RNG_ICR WO 0x00000000 3.5 Interrupt Clear Register, RNG_ICR
0x10C TRNG_CONFIG RW 0x00000000 3.6 Configuration register, TRNG_CONFIG
0x110 TRNG_VALID RO 0x00000000 3.7 Valid register, TRNG_VALID
0x114-0x128 EHR_DATA0- EHR_DATA5 RO 0x00000000 3.8 Entropy Holding Register Data registers, EHR_DATA[0,1,2,…5]
0x12C RND_SOURCE_ENABLE RW 0x00000000 3.9 Random Source Enable register, RND_SOURCE_ENABLE
0x130 SAMPLE_CNT1 RW 0x0000FFFF 3.10 Sample Count register, SAMPLE_CNT1
0x134 AUTOCORR_STATISTIC RWs 0x00000000 3.11 Autocorrelation register, AUTOCORR_STATISTIC
0x138 TRNG_DEBUG_CONTROL RO 0x00000000 3.12 Debug Control register, TRNG_DEBUG_CONTROL
0x13C - - - Reserved.
0x140 TRNG_SW_RESET WO 0x00000000 3.13 Reset register, TRNG_SW_RESET
0x144-0x1B4 - - - Reserved.
0x1B8 TRNG_BUSY RO 0x00000000 3.14 Busy register, TRNG_BUSY
0x1BC RST_BITS_COUNTER WO 0x00000000 3.15 Reset Bits Counter register, RST_BITS_COUNTER
0x1C0-0x1DC - - - Reserved.
0x1E0-0x1E8 RNG_BIST_CNTR0..2 RO 0x00000000 3.16 BIST Counter registers, RNG_BIST_CNTR[0, 1, 2]
0x1EC-0x1FC - - - Reserved.
a See Table 3-1 Access permissions for more information.
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