A.8 System interface signals

The system interface processes several input and output signals.

The following table shows the system interface signals.

Table A-8 System interface signals

Signal name Direction Source or destination Description
clk Input Clock generator Core clock for all GFC-100 interfaces.
resetn Input System controller

Active-LOW reset.

Assert asynchronously, release synchronously with clk.

irq Output Interrupt controller Interrupt request. Active-HIGH.
flash_pwr_rdy Output Process-specific part

Indicates that power to the Flash macro is stable. Active-HIGH.

The process-specific part monitors this signal for a rising edge after reset. Transactions towards the Flash macro are not initiated before the rising edge occurs. Additional transitions are ignored.

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