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Control register for initiating Flash accesses.
The CTRL register characteristics are:
|Usage constraints||There are no usage constraints.|
|Configurations||There is only one configuration.|
The following figure shows the bit assignments.
The following list shows the register bit assignments.
Initiate a command to the embedded Flash for the address that is stored in the ADDR register and with the data that are stored in DATA0 register. For WRITE and ROW WRITE commands, software must ensure that the state of the addressed word is cleared. The commands are:
0b011: ROW WRITE
0b111: MASS ERASE
Writing reserved commands has no effect. Reading back the CMD value shows the currently pending CMD. When the CMD is accepted, the CMD field is cleared to